The components of a computer system are typically coupled to a common bus for communicating information to one another. Various bus architectures are known in the prior art, and each bus architecture operates according to a communications protocol that defines the manner in which data transfer between components is accomplished.
The Institute of Electrical and Electronic Engineers (IEEE) has promulgated a number of different bus architecture standards, including IEEE Standards Document P1394, entitled High Performance Serial Bus, Draft 7.1v1 (hereafter the "P1394 serial bus standard"). A typical serial bus having the P1394 standard architecture is comprised of a multiplicity of nodes that are interconnected via point-to-point links such as cables that each connect a single node of the serial bus to another node of the serial bus. Data packets are propagated throughout the serial bus using a number of point-to-point transactions, wherein a node that receives a packet from another node via a first point-to-point link retransmits the received packet via other point-to-point links. A tree network configuration and associated packet handling protocol ensures that each node receives every packet once. The serial bus of the P1394 serial bus standard may be used as an alternate bus for the parallel backplane bus of the computer system, as a low-cost peripheral bus, or as a bus bridge between architecturally compatible buses.
The communications protocol of the P1394 serial bus standard specifies two primary types of bus accesses: asynchronous access and isochronous access. Asynchronous access may be either "fair" or "cycle-master." Cycle-master access is used by nodes that need the next available opportunity to transfer data. Isochronous access is used by nodes that require guaranteed bandwidth. The transactions for each type of bus access are comprised of at least one "subaction," wherein a subaction is a complete one-way transfer operation.
FIGS. 1A-1C show different subactions according to the P1394 serial bus standard. FIG. 1A shows a subaction for a fair write transaction. FIG. 1B shows a fair broadcast transaction. FIG. 1C shows a pair of concatenated subactions used for fair read and lock transactions. The subaction 1a of FIG. 1A includes an arbitration phase 2, a data transfer phase 3, and an acknowledge phase 4. During the arbitration phase 2, the arbitration protocol determines which of the nodes that have requested fair access to the serial bus will be granted control of the serial bus. The node that is granted control of the serial bus transmits a data packet on the serial bus during the data transfer phase 3. For some fair subactions, an acknowledge packet is used to signal receipt of the data packet, and the acknowledge phase 4 is provided so that a destination node may transmit such an acknowledge packet. To transmit the acknowledge packet, the destination node seizes control of the bus without arbitrating for control of the bus. An idle period 5 occurs between the data transfer phase 3 and the acknowledge phase 4. Acknowledge packets are not required for fair broadcast transactions. Accordingly, FIG. 1B shows asynchronous broadcast subaction 1b, which merely includes the arbitration phase 2 and the data transfer phase 3.
Two subactions are typically required to complete a read or lock transaction; however, separate arbitration phases are not required for each subaction of the transaction. As shown in FIG. 1C, two subactions 1c and 1d are concatenated together such that there is a single arbitration phase followed by a first data transfer phase, a first idle period, a first acknowledge phase, a second data transfer phase, a second idle period, and a second acknowledge phase.
As shown in each of FIGS. 1A-1C a period of idle time called a subaction gap 6 occurs after a subaction or a concatenated pair of subactions. The subaction gaps 6 shown as preceding each of the subactions 1a, 1b, and 1c are the subaction gaps 6 that occur after a previous subaction (not shown). Each subaction gap 6 is a constant amount of time T.sub.sa that, according to the P.sub.1394 serial bus standard, a node must remain idle before it is allowed to initiate the beginning of the arbitration phase for the next subaction. The subaction gap time T.sub.sa is typically set by system software when the serial bus is initialized.
The insertion of a subaction gap 6 between fair subactions is a result of a simple mechanism used by each node of a typical P.sub.1394 serial bus to regulate arbitration timing. For asynchronous bus traffic, each node waits for at least a subaction gap after data transfer before requesting control of the bus. This timing is enforced whether the data transferred by a node is a data packet or an acknowledge packet. The duration of the subaction gap 6 is selected to ensure that an acknowledge packet is allowed to propagate through the serial bus to the source node before the nodes begin arbitrating for control of the bus. The subaction gap time T.sub.sa is guaranteed to be of adequate duration if it is defined to be greater than a worst-case round-trip delay time T.sub.rt of the serial bus to ensure that a possible acknowledge packet is allowed to propagate throughout the serial bus before the nodes begin the arbitration phase of the next subaction. The delay time T.sub.rt includes the round-trip propagation delay between the two nodes of the serial bus having the greatest intervening timing delay. The round-trip propagation delay T.sub.rt between the nodes is measured from the time that the source node completes transmission of the data packet to the time that the source node begins reception of the acknowledge packet.
The subaction timing of the P.sub.1394 serial bus standard is enforced by arbitration logic disposed within the nodes of the serial bus, each of which is in one of the possible states shown in FIG. 2. FIG. 2 shows a simplified state diagram illustrating the state transitions for the arbitration logic that are of interest. The states and transitions of the arbitration state machine are described in more detail at pages 105-112 of the P1394 serial bus standard. FIG. 2 shows idle state A0, request test state A1, request delay state A2, request state A3, grant state A4, receive state A5, and transmit state A6, all of which are labeled according to the conventions of the P1394 serial bus standard. All inactive nodes stay in the idle state A0 until the occurrence of an internal or external event. A node in the request state A3 requests control of the serial bus. A node in the grant state A4 receives a grant signal which gives that node control of the bus so the node may enter transmit state A6 or pass the grant signal on to one of its child nodes. A node in the receive state A5 receives the data transmitted by the node in the transmit state A6. Request test state A1 consumes zero time and merely operates as a convenient point for testing whether a link request is active or not after a timing event. Request delay state A2 marks the start of the request handshake on the serial bus and is a time delay that is inserted to guarantee that all nodes detect the subaction gap or the arbitration reset gap. A more detailed description of the various states may be found in Appendix A.
The state transitions that ensure the subaction gap 6 include A5:A0a, A6:A0, and A0:A1. These transitions are shown in bold. The source node of a data packet goes from the transmit state A6 to the idle state A0 after the end of a data packet. During the A6:A0 transition, the variable idle.sub.-- time of the source node is reset to a zero value. The variable idle.sub.-- time for each node is used as a counter to determine the amount of time that node is idle, Nodes that did not win the arbitration phase go from the receive state A5 to the idle state A0 after the received data packet is retransmitted or "repeated." The variable idle.sub.-- time of a node is also set to zero during the A5:A0a transition.
Once a node goes idle, it remains idle until the next internal or external event. For the fair broadcast subaction 1b, there are typically no further events after the data transfer phase 3, and the nodes remain idle for the subaction gap 6. For the subaction 1a, a node is in the idle state A0 during the idle period 5, but the acknowledge packet is received or transmitted during the acknowledge phase 4 reducing the length of the idle period 5 to less than the subaction gap time T.sub.sa. During the acknowledge phase 4 of subaction 1a, the destination node goes to the transmit state A6 via the A0:A6 transition so that it may transmit the acknowledge packet. The destination node returns to the idle state A0 via the A6:A0 transition after transmission of the acknowledge packet. The remaining nodes go to the receive state A5 via the A0:A5 transition in response to receiving the acknowledge packet. After the acknowledge packet propagates through a node, the node is returned to the idle state A0 via the A5:A0a transition.
A node may enter the request test state A1 if the node has been idle for the subaction gap time T.sub.sa. Therefore, transition A0:A1a occurs if idle.sub.-- time is equal to the constant subaction.sub.-- gap.sub.-- detect.sub.-- time, which is defined to be the subaction gap time T.sub.sa. Transition A0:A1 is the beginning of the arbitration sequence that places a node in the request state A3.
According to the P1394 serial bus standard, each node must remain idle for the subaction gap time after the transmission, repeating, or receipt of a packet before that node is allowed to begin the arbitration phase of the next subaction, regardless of whether the packet is a data packet or an acknowledge packet. However, once an acknowledge packet has been transmitted, repeated, or received, the subaction is complete because acknowledge packets are never themselves "acknowledged" by a second acknowledge packet. Therefore, requiring a node to remain idle for the subaction gap time after the acknowledge phase of a fair subaction is unnecessary and results in the underutilization of bus bandwidth.